1. Field of the Invention
The present invention relates to an image sensor of a single IC chip and a control method of the image sensor having a light receiving element array arranged in a two dimensional (2D) arrangement and a plurality of analogue to digital (A/D) conversion circuits. The light receiving element array has at least picture element cells made of photoelectric conversion elements arranged in a 2D array, and the A/D conversion circuits perform A/D conversion of detection signals or light signals transferred from the light receiving element array.
2. Description of the Related Art
Recently, there is a strong demand to provide an image sensor capable of performing a high speed operation and to reduce the size of the image sensor in order to apply such an image sensor to various application fields such as a high performance visual sensor and image sensors. The high performance visual sensor is applicable to factory automation (FA) robots, anthropomorphic robots, and human-like robots (toy, nursing care, working, etc.). The image sensor is also applicable to a visual sensor capable of monitoring all directions, the front, rear, right, and left positions around a vehicle in improving driving safety.
In order to satisfy such a demand, there is a conventional image sensor of a single IC chip on which a light receiving element array arranged in a two dimensional (2D) arrangement and a plurality of analogue to digital (A/D) conversion circuits are formed. The light receiving element array has at least picture element cells made of photoelectric conversion elements (for example, photo diodes) arranged in a 2D array. The A/D conversion circuits perform A/D conversion of detection signals or light signals transferred from the light receiving element array. A Japanese patent laid open publication number JP2000-349638 has disclosed the conventional image sensor of a single IC chip having the configuration described above.
FIG. 10A is a diagram showing a configuration of the conventional image sensor disclosed by the Japanese patent laid open publication number JP2000-349638. FIG. 10B is a circuit diagram showing the configuration of the A/D conversion circuit 102.
As shown in FIG. 10A, the conventional image sensor 100 has a light receiving element array 101, an A/D conversion section 102, a selection section 103, a reference signal generation section 104, and a counter 105.
The light receiving element array 101 has picture elements arranged in a lattice arrangement. The A/D conversion section 102 has A/D conversion circuits 120, each of the A/D conversion circuits 120 corresponds to a group of the picture elements 110 that form each horizontal line (as a row in a lattice arrangement) of the light receiving element array 101. The selection section 103 selects the group made of the picture elements 110 that form each vertical line (as a column in a lattice arrangement) of the light receiving element array 101. The reference signal generation section 104 generates a reference signal VREF of a lamp wave, the voltage level of which increases according to the elapse of time. The counter 105 changes, namely increases or decreases its count value in synchronization of the reference signal VREF.
Each A/D conversion circuit 120 in the A/D conversion section 102 is configured to convert the detection signal (or light signals as output voltage) from the picture element cells 110 in a vertical line selected by the selection section 103.
In order to achieve downsizing, each A/D conversion sections 102 in the A/D conversion circuit 120 in the image sensor disclosed by the Japanese patent laid open publication number JP2000-349638 is made of special type A/D converter such as a successive approximation type A/D converter, a parallel type A/D converter, and a double integration type A/D converter that are different in configuration from an usual A/D converter.
In a concrete example shown in FIG. 10B, each A/D conversion circuit 120 has a comparator 121, a latch circuit 122, and a switch 123. The comparator 121 compares an analogue signal transferred from the light receiving element array 101 with the reference signal Vref generated by and supplied from the reference signal generation section 104, and generates a detection pulse that becomes a high level voltage at a timing at which the voltage of the analogue signal VSIGi (i=1, . . . , and m) crosses the reference signal VREF. The latch circuit 122 latches the output from the counter 105 at the timing of the detection pulse transferred from the comparator 121. The switch 123 transfers the output signal corresponding to the detection pulse latched by the latch circuit 122 to output lines of a digital signal connected to a digital signal processing (DSP).
Various digital processing devices achieve various functions by processing information transferred from the image sensor performs in order to perform various control operations. One of the functions is a zoom-in (or zooming-up) function to enlarge a part of the images read from the image sensor.
In fact, the zoom-in function requires only the detection signals read from the light receiving elements (arranged in a 2D pattern) in the target 2D part of the 2D (two dimension) image and does not necessary other parts of the image in the zoom-in function. However, the conventional image sensor 100 having the configuration disclosed by the Japanese patent laid open publication number JP2000-349638 cannot perform the A/D conversion only for the target 2D part of the image. In other words, the conventional image sensor 100 performs the A/D conversion of the 2D image data from the entire of the image plane, not a part of the entire of the image plane. This configuration introduces the execution of the A/D conversion for unnecessary part and inefficient A/D operation because the conventional image sensor 100 must perform the A/D conversion process for the light signals obtained from the entire of the image plane that are not use in the zoom-in operation.
The A/D conversion circuit 120 in the image sensor 100 disclosed in the Japanese patent laid open publication number JP2000-349638 sweeps or scans the detection signal from the light receiving element array 101 with the lamp wave of analogue signal and outputs A/D conversion data to the DSP. In order to increase the resolution of the A/D conversion data without changing a performable voltage range for the A/D conversion, it is necessary to perform a fast counting of the counter 105 by increasing the number of bits or to decrease the slope of the lamp wave.
However, the fast counting of the counter 105 involves a limitation in operation. Further, decreasing the slope of the lamp wave requires a long processing time for the A/D conversion, and it is thereby difficult to apply the image sensor having such an A/D converter to products requiring a high speed operation.
Because the number of bits of the counter has a limitation of approximately 10 bits, it becomes difficult to apply such a conventional image sensor to products requiring a high resolution.